As the device geometries of integrated circuits continue to decrease with improvements in manufacturing processes, greater numbers of circuits can be fabricated on a single integrated circuit die. There is also an increased probability that at least some of these circuits will be defective in some way. It has become standard practice in the design of Dynamic Random Access Memory (DRAM) devices to provide redundant memory elements that can be used to replace defective memory elements and thereby increase device yields. Redundant elements can only be used to repair certain types of defects by replacing a row, column or an array of devices. Depending on the particular defect repaired, the device may exhibit undesirable characteristics such as increased standby current, speed degradation, reduction in operating temperature range, or reduction in supply voltage range as a result of the defect being present on the die. Certain other types of defects cannot be repaired effectively through redundancy techniques alone. Defects such as power to ground shorts in a portion of the array can prevent the device from operating even to the extent required to locate the defect in a test environment. Memory devices with limited known defects have been sold as "partials", "audio RAMs" or "off spec devices" provided that the defects do not prohibitively degrade the performance of the functional portions of the memory. The value of a partially functional device decreases dramatically as the performance of the device deviates from that of the standard fully functional device. The desire to make use of devices with limited defects, and the problems associated with the performance of these devices due to the defects are well known in the industry.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an integrated circuit which can be modified after fabrication using a selective power distribution system to isolate portions of the integrated circuit and maximize production yield.
The above mentioned problems with integrated circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
The present invention describes an integrated circuit that includes multiple block elements, at least one isolation circuit to influence the multiple block elements to reduce operational capacity of a defective block element, a bus, and a control circuit to provide control and data signals to and from the block elements via the bus. The present invention also describes the multiple block elements as diverse in functionality with respect to other block elements. The present invention additionally describes the multiple block elements as similar in functionality with respect to the other block elements. The present invention describes that the isolation circuit includes a current detector circuit to monitor and disable the defective block element when a predetermined power usage is reached. The present invention also describes a test circuit for determining the defective block element.
In a second embodiment, a memory module is described as comprising a plurality of memory devices, at least one functionally defective; a plurality of data input and output lines, connected correspondingly to each of the plurality of memory devices; and means for performing the function of terminating the data input and output lines, and isolating the at least one functionally defective device so that the desired memory module configuration is obtained.
In a third embodiment, a memory device is described to include a plurality of subarrays, at least one subarray has primary power and control signals which can be isolated; a test circuit operating to enable or disable each of the plurality of subarrays to identify at least one defective subarray; and at least one programmable element to isolate defective subarrays to be permanently disabled at least with respect for the end user of the memory device.